An information processing device using dataflow for information processing has been disclosed by Uchida in U.S. Pat. No. 4,675,806. Uchida describes a system in which instruction processing is performed on the basis of the availability of data and in which the flow of data and instructions are separated but the data is transferred as directed and required by the instructions. This device has a relatively low level of performance which is common to other computing devices which use dataflow control over computation and direct addressing operative memory as the hardware means for data storage. The reduced performance is due to the complicated hardware organization of the control means and to the expenditure of time during the process of the dynamic distribution of memory.
Another known data processing device, described in Russian Federation Patent 2029359, which uses dataflow for control of the computation process, contains a processor, an input-output switch, instruction loading switch, instruction memory, data access unit, and first and second information outputs. In this device, the first control output of the processor is connected with the first control input of the input-output switch, the first control input of which is connected with the first control input of the data access unit, the first information input of which is connected with the information output of the instruction loading switch, the first control input of which is connected with the second control output of the processor, the first and second information outputs of which are connected correspondingly with the first information input of the instruction loading switch and the first information input of the input-output switch, the third information output of the processor is connected with the first information output of the computer, the zeroizing input of the data access unit is connected to the zeroizing output of the computer, and the information input of instruction memory and the information input of the instruction loading switch are connected with the first information input of the computer.
This device uses dataflow for control of the computation process and associative memory (data access unit) hardware for storage of data and results. The associative memory simultaneously performs the function of control means hardware. Accordingly, since there is no loss of time on the processes of memory distribution, performance increases.
However, in this device, the performance of the device depends directly on the associative memory (in data access unit) and is defined by the speed of data output from associative memory (number of operands ready to performance in a unit of time N=1/Tam, where Tam=time of work of associative memory from the moment of inquiry to the output of data).
The value Tam depends directly on the volume of associative memory. Since Tam, measured from the time of inquiry from a running routine, increases as the size of the associative memory increases, the performance of the device decreases as the size of the associative memory increases.
Thus, the device fails to achieve a high level of performance when large volumes of running routines are processed.